From f95a85de0082010e4af83e26e99299d601bb48d6 Mon Sep 17 00:00:00 2001 From: Steven Le Rouzic Date: Mon, 13 May 2024 00:04:44 +0200 Subject: Some work on CSR --- emulator/instruction.h | 80 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 80 insertions(+) create mode 100644 emulator/instruction.h (limited to 'emulator/instruction.h') diff --git a/emulator/instruction.h b/emulator/instruction.h new file mode 100644 index 0000000..97c9fe9 --- /dev/null +++ b/emulator/instruction.h @@ -0,0 +1,80 @@ +#pragma once + +#include + +#include "emulator/bits.h" + +struct Instruction +{ + uint8_t opcode; + uint8_t rs1; + uint8_t rs2; + uint8_t rd; + uint8_t funct3; + uint8_t funct7; + uint32_t imm; +}; +typedef struct Instruction Instruction; + +static Instruction decode_r_type(uint32_t word) +{ + Instruction instruction = {0}; + instruction.opcode = word & 0x7F; + instruction.rd = (word >> 7) & 0x1F; + instruction.funct3 = (word >> 12) & 0x07; + instruction.rs1 = (word >> 15) & 0x1F; + instruction.rs2 = (word >> 20) & 0x1F; + instruction.funct7 = word >> 25; + return instruction; +}; + +static Instruction decode_i_type(uint32_t word) +{ + Instruction instruction = {0}; + instruction.opcode = word & 0x7F; + instruction.rd = (word >> 7) & 0x1F; + instruction.funct3 = (word >> 12) & 0x07; + instruction.rs1 = (word >> 15) & 0x1F; + instruction.imm = sign_extend(word >> 20, 12); + return instruction; +}; + +static Instruction decode_s_type(uint32_t word) +{ + Instruction instruction = {0}; + instruction.opcode = word & 0x7F; + instruction.funct3 = (word >> 12) & 0x07; + instruction.rs1 = (word >> 15) & 0x1F; + instruction.rs2 = (word >> 20) & 0x1F; + instruction.imm = sign_extend(((word >> 7) & 0x1F) | (word >> 25), 12); + return instruction; +}; + +static Instruction decode_b_type(uint32_t word) +{ + Instruction instruction = decode_s_type(word); + instruction.imm = ((instruction.imm << 11) & 0x800) | (instruction.imm & 0xfffff7ff); + return instruction; +}; + +static Instruction decode_u_type(uint32_t word) +{ + Instruction instruction = {0}; + instruction.opcode = word & 0x7F; + instruction.rd = (word >> 7) & 0x1F; + instruction.imm = word & 0xFFFFF000; + return instruction; +}; + +static Instruction decode_j_type(uint32_t word) +{ + Instruction instruction = {0}; + instruction.opcode = word & 0x7F; + instruction.rd = (word >> 7) & 0x1F; + instruction.imm = sign_extend( + ((word & 0x80000000) >> 11) | + ((word & 0x000FF000) >> 0) | + ((word & 0x00100000) >> 9) | + ((word & 0x7FE00000) >> 20), 21); + return instruction; +} -- cgit