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Some work on CSR

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This commit is contained in:
Steven Le Rouzic
2024-05-13 00:04:44 +02:00
parent f9541157b6
commit f95a85de00
12 changed files with 403 additions and 227 deletions
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80
emulator/instruction.h Normal file
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#pragma once
#include <stdint.h>
#include "emulator/bits.h"
struct Instruction
{
uint8_t opcode;
uint8_t rs1;
uint8_t rs2;
uint8_t rd;
uint8_t funct3;
uint8_t funct7;
uint32_t imm;
};
typedef struct Instruction Instruction;
static Instruction decode_r_type(uint32_t word)
{
Instruction instruction = {0};
instruction.opcode = word & 0x7F;
instruction.rd = (word >> 7) & 0x1F;
instruction.funct3 = (word >> 12) & 0x07;
instruction.rs1 = (word >> 15) & 0x1F;
instruction.rs2 = (word >> 20) & 0x1F;
instruction.funct7 = word >> 25;
return instruction;
};
static Instruction decode_i_type(uint32_t word)
{
Instruction instruction = {0};
instruction.opcode = word & 0x7F;
instruction.rd = (word >> 7) & 0x1F;
instruction.funct3 = (word >> 12) & 0x07;
instruction.rs1 = (word >> 15) & 0x1F;
instruction.imm = sign_extend(word >> 20, 12);
return instruction;
};
static Instruction decode_s_type(uint32_t word)
{
Instruction instruction = {0};
instruction.opcode = word & 0x7F;
instruction.funct3 = (word >> 12) & 0x07;
instruction.rs1 = (word >> 15) & 0x1F;
instruction.rs2 = (word >> 20) & 0x1F;
instruction.imm = sign_extend(((word >> 7) & 0x1F) | (word >> 25), 12);
return instruction;
};
static Instruction decode_b_type(uint32_t word)
{
Instruction instruction = decode_s_type(word);
instruction.imm = ((instruction.imm << 11) & 0x800) | (instruction.imm & 0xfffff7ff);
return instruction;
};
static Instruction decode_u_type(uint32_t word)
{
Instruction instruction = {0};
instruction.opcode = word & 0x7F;
instruction.rd = (word >> 7) & 0x1F;
instruction.imm = word & 0xFFFFF000;
return instruction;
};
static Instruction decode_j_type(uint32_t word)
{
Instruction instruction = {0};
instruction.opcode = word & 0x7F;
instruction.rd = (word >> 7) & 0x1F;
instruction.imm = sign_extend(
((word & 0x80000000) >> 11) |
((word & 0x000FF000) >> 0) |
((word & 0x00100000) >> 9) |
((word & 0x7FE00000) >> 20), 21);
return instruction;
}