Enable and configure APLIC & IMSIC

This commit is contained in:
2024-06-04 18:56:27 +02:00
parent 45f420a338
commit f95c522b0a
7 changed files with 213 additions and 28 deletions

View File

@ -3,6 +3,7 @@
#include "kernel/kalloc.h"
#include "kernel/vm.h"
#include "kernel/cpu.h"
#include "kernel/aplic.h"
Cpu cpus[MAX_CPU];
@ -12,13 +13,51 @@ extern uint32_t _ram_end;
void kstrap()
{
panic("kstrap");
uint32_t scause;
__asm__ volatile("csrr %0, scause" : "=r"(scause));
switch (scause)
{
case 0: panic("kstrap: Instruction address misaligned");
case 1: panic("kstrap: Instruction access fault");
case 2: panic("kstrap: Illegal instruction");
case 3: panic("kstrap: Breakpoint");
case 4: panic("kstrap: Load address misaligned");
case 5: panic("kstrap: Load access fault");
case 6: panic("kstrap: Store/AMO address misaligned");
case 7: panic("kstrap: Store/AMO access fault");
case 8: panic("kstrap: Environment call from U-mode");
case 9: panic("kstrap: Environment call from S-mode");
case 12: panic("kstrap: Instruction page fault");
case 13: panic("kstrap: Load page fault");
case 14: panic("kstrap: Reserved");
case 15: panic("kstrap: Store/AMO page fault");
case 18: panic("kstrap: Software check");
case 19: panic("kstrap: Hardware error");
default: panic("kstrap: Unknown");
}
}
void uart_init()
{
volatile char* UART_BASE = (volatile char*)0x1000'0000;
// Set LCR[1:0] to 0b11 for 8-bit words
*(UART_BASE + 3) = 0b0000'0011;
// Set FCR[0] to 1 to enable FIFO
*(UART_BASE + 2) = 0b0000'0001;
// Set IER[0] to 1 to enable interrupts on receive
*(UART_BASE + 1) = 0b0000'0001;
}
void kstart()
{
uart_init();
kalloc_init();
kvm_init();
aplic_init();
panic("kstart: end");
}